Reliable Data Processor Using VLSI

To: Dr. Winfred P Anakwa

From: Rahul Chopra

Date: October 10, 2001

Subject: Senior Project Functional Description

Title: Reliable Data Processor in VLSI

The Reliable Data Processor in VLSI is a data processor that will carry out various Arithmetic and Logic operations on data bits, encode the output, and forward it to an external reliable chip for reliability testing.

Building this data processor includes designing and fabricating in VLSI a controller, an arithmetic logical processor, and an encoder. In addition, the inputs to the system will be provided by data registers, which will also be built and designed as storage elements in VLSI. The controller will have a user interface which allows the user to pick arithmetic or logical operations to be performed on the inputs. The controller will control the ALU, instructing it to carry out the selected operation. The encoder will encode the output from the ALU and transmit the data to an external reliable data chip for testing. The system will also have feedback capabilities, as the external reliable chip will send a 1-bit flag to the processor. Based on the value of this flag, the processor will be able to detect incorrect data transfer and will resend the data to the external chip.

Fig 1-1 Basic Block Diagram

Output to External Chip

Error Flag from External Chip

Controller

User

Figure 1-2. Block Diagram showing Sub-Systems and External Chip

Register Subsystem:

The register subsystem consists of data registers, storage devices that will supply the ALU of the processor with inputs. The input to the registers will come from an external device. The input to the registers will be in the form of a data stream. The registers will store the data, and output 4 parallel bits to the ALU. Refer to figure 2-1 for a diagram of the Register subsystem showing input/output characteristics

Controller:

The controller controls the ALU. The input to the controller is the users choice. The controller offers the user a choice of arithmetic and logic operations and based on what the users picks, the controller instructs the ALU to carry out those operations. The controller also receives a 1-bit flag input from the reliable chip, which allows the controller to sense incorrect/erroneous data transfer. In case the bits received by the reliable chip are erroneous, the controller instructs the data to be resent.

Refer to figure 3-1 for a diagram of the controller subsystem showing input/output characteristics

ALU:

The ALU or the Arithmetic and Logic Unit performs basic arithmetic and logical operations on the data. Some of the operations include multiplication, AND, OR, NAND, NOR and XOR operations on bits from each of the registers. The ALU receives data from the data bus and instructions on what operations to carry out on the data from the Controller. Upon carrying out the operations, the ALU forwards the 4-bit output to the encoder. Refer to figure 3-2 for a diagram of the ALU subsystem showing input/output characteristics

Encoder:

The encoder receives the 4-bit output from the ALU and adds 3 parity bits to output a 7-bit serial data stream. The encoder then forwards this data stream to the external reliable chip for testing. Refer to figure 3-3 for a diagram of the encoder subsystem showing input/output characteristics

External Reliable Chip:

The reliable chip receives encoded data from the processor and does reliability checks on it after separating the data from the parity bits. In case the data transfer is erroneous, it sends an error flag to the controller, which will then resend the data.

Data Registers

Fig 2-1 Register Subsystem