Wireless Terminal and PC Interface using VLSI


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    VLSI | LogicWorks | VHDL | Presentations | General

VLSI Gates

Function SPICE Circuit Description
Plots .cir .tdb .jpg
Inverter single in, single out: z = a'
AND dual in, single out: z = ab
NAND dual in, single out: z = (ab)' = a' + b'
NAND-3 triple in, single out: z = (abc)' = a' + b' + c'
NAND-4 quad in, single out: z = (abcd)' = a' + b' + c' + d'
OR dual in, single out: z = a + b
NOR dual in, single out: z = (a + b)' = a'b'
NOR-3 triple in, single out: z = (a + b + c)' = a'b'c'
NOR-7 seven in, single out: z = (a + b + c + d + e + f +g)' = a'b'c'd'e'f'g'
XOR dual in, single out: z = ab' + a'b
XNOR dual in, single out: z = ab + a'b'
D Flip-flop single in, dual out: standard D flip-flop
Address Decoder 10-bit Address Decoder for ISA bus
9 Bit Counter     9 bit counter used as clock divider

 
 

LogicWorks Files

File Size Description
adrslogc.cct 13.1kB Addressing logic for 300h and 302h
adrstest.cct 17.8kB Addressing logic with test circuitry for 300h and 302h
CNT9_J_K.CCT 19.2kB 9 bit up counter with J-K Flip-flops
CNT9_D.CCT 22.3kB 9 bit up counter with D Flip-flops

 
 

VHDL Files

File Size Description
addecod.vhd 680 Bytes Address Decoding for 300h and 302h

 
 

Presentations

File Size Description
prelimpres.ppt 1131kB Preliminary presentation (Powerpoint)
finalpres.ppt 1.57MB Final presentation (Powerpoint)
PPView97.exe 2826kB FREE Powerpoint viewer for Windows (microsoft.com)

 
 

Generally Useful Downloads

File Size Description
winzip81.exe 1.8MB Winzip 8.1 evaluation software (winzip.com)
PPView97.exe 2826kB FREE Powerpoint viewer for Windows (microsoft.com)