The project is to design the arithmetic logic unit (ALU) for a Reduced Instruction Set Computing (RISC) processor. Aida Todri and Kyle Wilken are doing the control unit, Jeff Patrick and Ricardo Gonzalez are doing the registers, and the memory parts of the project will be done by Ryan Moffitt and Nandor Toth. When all the separate units are complete they will be put together to make the full RISC processor.The block diagram, seen in Figure 1 of page 2, shows that the system will be a 4-bit ALU that will perform sixteen different logic functions and sixteen different arithmetic functions on two 4-bit inputs. The ALU will generate a 4-bit output, a comparison of the two 4-bit inputs, a carry in signal, and a carry out signal. The mode control will be what is responsible in differentiating between logic functions or arithmetic functions. This can be set to either ‘0’ or ‘1’ to switch between both types of functions.

The four different function selection bits, S0-S3, will determine which of the sixteen logic functions or sixteen arithmetic functions will be performed. This will make the ALU capable of carry out thirty-two different functions. A table showing the functions of the ALU is in Figure 2 on page 3. The table shows various operations which are signified by a ‘+’, used to add in the arithmetic functions and used to OR and Exclusive OR in the logic functions, signified by a ‘-‘ for subtraction in arithmetic functions, letters next to each other show multiplication, dots between letters show a logic AND, and bars above letters show them being complemented. These basic functions all have to be taken into consideration when designing and implementing the ALU.