Below is the software flow chart for the 64-bits of memory.
The basic command for setting up the VHDL code is the case statement. When making memory, information must be stored in certain locations. With the case statement, each location could be set up to do a specific function.
An example is below:
(Here the select lines are all set to the needed location
and then an if statement chooses what do do with the information.)
when "000" =>
if (write ='0') then
save0 <= input;
output <= highz;
elsif (read = '0') then
output <=save0;
else
output <= highz;
end if;