Advisor: Dr. S. N. Prasad The purpose of this project was to design, build and test a single-stage
MESFET Power Amplifier from 3.7 to 4.2 GHz having a gain of 12.5 dB and
output power of 14 dBm. The transistor used in the design was NE 76084
(NEC). The amplifier was designed using Cripp's theory for maximum linear
power. The large signal model of the FET was used in the Output power simulations.
The small signal performance simulations were done using small signal model
of the FET. The simulations were carried out using EEsof Libra and Academy
CAE software packages. The amplifier design was optimized using manual
tuning and optimization procedures provided by EEsof Libra. The amplifier
including the DC-bias circuitry was built using hybrid Microwave Integrated
Circuit (MIC) techniques on RF-Duroid (er="2".2) circuit board. The amplifier
was tested using a Network Analyzer.
|
[Prospective Students]
[Current Students]
[Alumni]
[Faculty]
[Home] [Contact us] [Curriculum] [Senior Projects] [Research] [People] [Links] Copyright (c)1995-2013 Bradley University. All rights reserved. . . |